Photolithography or optical lithography systems used in the manufacture of integrated circuits have been around for some time. Such systems have proven extremely effective in the precise manufacturing and formation of very small details in the product. In most photolithography systems, a circuit image is written on a substrate by transferring a pattern via a light or radiation beam (e.g., UV or ultraviolet light). For example, the lithography system may include a light or radiation source that projects a circuit image through a reticle and onto a silicon wafer coated with a material sensitive to irradiation, e.g., photoresist. The exposed photoresist typically forms a pattern that after development masks the layers of the wafer during subsequent processing steps, as for example deposition and/or etching.
Two example process parameters for controlling the photolithographic process are focus and exposure (also referred to as “dose”). Focus generally deals with clarity with which an optical subsystem of the lithography system renders an image, and exposure generally deals with the amount or dosage of light (or radiation) that is used to form the pattern (such as the light produced by a light source of the lithography system). Both affect the circuit pattern in a non-trivial way. For example, changes in focus and exposure may cause changes in the resist profile and the shape of the circuit printed in the photoresist.
Different structure types often have different process windows for controlling lithography focus and exposure settings at which such structures can be formed without defects. The intersection of these windows for the different structures can be defined as an optimal range of focus and exposure settings or window.
Presently, optimal focus and exposure settings of the lithography system are determined using a focus exposure matrix (FEM) to expose a wafer with multiple combinations of focus and exposure and then inspecting the resultant pattern for the best resist profiles—the resist profiles that more closely match the desired or optimal resist profiles. The inspection is generally performed by a CD scanning electron microscope (CD-SEM) that measures various parameters of the resist profile, such as CD. In most cases, the wafer has to be destroyed, e.g., cut through, so that these parameters can be measured. The process window is generally defined as the region of focus and exposure that keeps the final resist profile within prescribed specifications (e.g., process window typically includes the optimum focus and exposure). However, CD-SEM techniques for determining an optimum process window are often time consuming, unreliable, and unable to measure certain a sidewall resist profile.
Additionally, as IC structure size continues to shrink and the process window margins also shrink, it becomes challenging to maintain structure uniformity during production. Several factors in manufacturing, including lithography cell exposure sequence perturbations convoluted with reticle enhancement features, contribute to feature response that varies across the exposure field in unexpected and often unpredictable ways.
In view of the foregoing, improved techniques for determining and monitoring optimal focus and exposure settings of a photolithographic system are desired.